CS 147 Computer Architecture
Introduction to computer systems design. Survey various machine architectures including implementation alternatives for major processor sub-systems. Discussion includes data representation, arithmetic logic unit operations and algorithms, control processor unit instruction formats, memory addressing schemes, and hierarchical memory organization. "Non-classical" architectures such as parallel processors and RISC machines are also presented. Performance measurement and speedup techniques are studied to perform tradeoff analysis and design optimization. Digital breadboard labs and programming projects using the VHDL language and simulation environment will be used to demonstrate gate-level computer-aided design and functional verification techniques for digital systems.
Section 2: TR 10:30am – 11:45am MH223.
Math 42 and CS 140, each with a grade of "C-" or higher.
Robert K. Chun
Email: ProfessorChun@gmail.com, Phone: 408-924-5137, Office: MH 413
Monday 11:30am – 12:30pm, 4:15pm – 4:45pm, 8:15pm – 9:00pm
Tuesday 11:45am – 12:15pm
Wednesday 1:45pm – 2:15pm, 4:15pm – 4:45pm, 8:15pm – 9:00pm
Thursday 11:45am – 12:15pm
Required: Computer Organization and Design: The Hardware/Software Interface, 4th Ed., D. Patterson, 2008, Elsevier Science & Technology Books, ISBN 9780123744937, or Computer Organization and Design: The Hardware/Software Interface, 3rd Ed., D. Patterson, 2005, Morgan Kaufmann, ISBN 1-55860-604-1
Required CS 147 Course Reader, Chun. Purchase at SJSU A.S. Print Shop.
Optional: A VHDL Primer, J. Bhasker, 3rd Ed., 1998, Prentice Hall, ISBN 0130965758
Grading consists of two midterms, one final, and a set of projects (consisting of a combination of written problems and VHDL programming assignments) weighted as shown below. Grading is based on a class curve. All assignments must be completed by the student on the due date specified to receive credit for the class. All students must uphold academic honesty, per university policy detailed at http://www2.sjsu.edu/senate/f88-10.htm.
Midterm Approx. Week 6 20%
Midterm Approx. Week 12 20%
Final 12/17/10 9:45am 40%
Lecture Chapter Topic
1-4 1, 2 Introduction, VHDL
5-6 3 Data Representation
7-11 3 Computer Arithmetic
12-18 7 Memory Organization
19-21 2, 5 Control Unit, Instruction Formats
22-24 6 Pipeline and Vector Processing
25-27 6 Multiprocessors, RISC
Student Learning Outcomes:
Upon successful completion of this course, students should be able to:
· Understand the role of each major hardware component of a computer system and their synergistic interaction with each other and software.
· Analyze and perform tradeoffs between the cost, performance, and reliability of alternative computer architectures.
· Understand, analyze, and design digital logic structures for the basic combinational and sequential circuits.
· Understand the alternative binary internal representation of information (such as sign-magnitude, one's complement, two's complement, and floating point) along with their optimizations and tradeoffs.
· Be able to perform basic mathematical operations (add, multiply) in the various Boolean number representation schemes.
· Understand the operation of, and be able to analyze from a cost/performance standpoint, certain optimized hardware structures (for instance, fast ALU circuits such as carry look-ahead adders, carry select adders, Booth multipliers).
· Appreciate the need to use a memory hierarchy and understand how locality of memory referencing in typical programs can be leveraged to perform effective memory architecture management.
· Understand and emulate the various mapping, replacement, and dynamic memory allocation algorithms for cache and virtual memory management.
· Understand the rationale and philosophy behind both complex instruction set computers (CISC) and reduced instruction set computers (RISC), and the tradeoffs between the two architectures.
· Understand how pipelining and parallel processing are cost-effective methods of increasing hardware performance.
· Appreciate how computer-aided design tools and hardware description languages can be used to verify and measure the performance of hardware designs.
General University Policies
If you need course adaptations or accommodations because of a disability, or if you need special arrangements in case the building must be evacuated, please inform the instructor as soon as possible. Presidential Directive 97-03 requires that students with disabilities register with DRC to establish a record of their disability.
Academic integrity is essential to the mission of San José State University. As such, students are expected to perform their own work (except when collaboration is expressly permitted by the course instructor) without the use of any outside resources. Students are not permitted to use old tests or quizzes when preparing for exams, nor may they consult with students who have already taken the exam. When practiced, academic integrity ensures that all students are fairly graded.
We all share the obligation to maintain an environment which practices academic integrity. Violations to the Academic Integrity Policy undermine the educational process and will not be tolerated. It also demonstrates a lack of respect for oneself, fellow students and the course instructor, and can ruin the university’s reputation and the value of the degrees it offers. Violators of the Academic Integrity Policy will be subject to failing this course and being reported to the Office of Judicial Affairs for disciplinary action which could result in suspension or expulsion from San José State University.
At SJSU, cheating is the act of obtaining or attempting to obtain credit for academic work through the use of any dishonest, deceptive, or fraudulent means. Cheating at SJSU includes but is not limited to:
Copying in part or in whole, from another’s test or other evaluation instrument; Submitting work previously graded in another course unless this has been approved by the course instructor or by departmental policy. Submitting work simultaneously presented in two courses, unless this has been approved by both course instructors or by departmental policy. Altering or interfering with grading or grading instructions; Sitting for an examination by a surrogate, or as a surrogate; any other act committed by a student in the course of his or her academic work which defrauds or misrepresents, including aiding or abetting in any of the actions defined above.
At SJSU plagiarism is the act of representing the work of another as one’s own (without giving appropriate credit) regardless of how that work was obtained (hardcopy, softcopy, Internet), and submitting it to fulfill academic requirements. Plagiarism at SJSU includes but is not limited to:
The act of incorporating the ideas, words, sentences, paragraphs, or parts thereof, or the specific substances of another’s work, without giving appropriate credit, and representing the product as one’s own work; and representing another’s artistic/scholarly works such as musical compositions, computer programs, photographs, painting, drawing, sculptures, or similar works as one’s own.