Organization

A Pentium can operate in two modes: real and protected. In real mode it emulates an i8086 processor that addresses a 1 MB segmented memory space.

In protected mode the Pentium can address a 64 GB memory space that can either be segmented or flat.

Abstractly, we can view memory as four distinct segments:

Machine language instructions are stored in the code segment.

Locals and parameters are stored in stack frames on the stack.

Globals are stored in the data segment or any of the three extra segments.

Internally, the Pentium has 10 32-bit and 6 16-bit registers:

	The 32-bit Data Registers
		ax (16 bits)
eax	16 bits	ah (8 bits)	bl (8 bits)	accumulator
		bx (16 bits)
ebx	16 bits	bh (8 bits)	al (8 bits)	base
		cx (16 bits)
ecx	16 bits	ch (8 bits)	cl (8 bits)	counter
		dx (16 bits)
edx	16 bits	dh (8 bits)	dl (8 bits)	data
	The 32-bit index registers
esi	16 bits	si (16 bits)		source index
edi	16 bits	di (16 bits)		destination index
	The 32-bit pointer registers
esp	16 bits	sp (16 bits)		stack pointer
ebp	16 bits	bp (16 bits)		base pointer
	The 32-bit control registers
eip	16 bits	ip (16 bits)		instruction pointer
eflags	16 bits	flags (16 bits)		status flags
	The 16 bit segment registers
cs				code segment
ds				data segment
ss				stack segment
es				extra segment
fs				extra segment
gs					extra segment

Segment Registers

In real mode the segment registers point to the start of a 1 MB segment. Any of the other 16 bit registers is considered an offset into some segment. For example, the stack pointer is an offset into the stack segment. The 16 bit segment is added to the 16 bit offset to produce the physical address. (Four zeros are added to the end of the 16 bit segment register to get the 20 bit address of the start of a segment.)

In protected mode the segment register is only an index into a table that contains many segment descriptors. A segment can be up to 4 GB. We can also set the segments to begin at 0x0 and have a flat 64 GB address space.

Control Registers

Most instructions set one or more of the nine flags in the 16-bit FLAGS register to indicate their execution status. Conditional goto instructions use these flags to decide if a jump should be performed.

Overflow Flag (OF) - set if the result is too large positive number, or is too small negative number to fit into destination operand.

Direction Flag (DF) - if set then string manipulation instructions will auto-decrement index registers. If cleared then the index registers will be auto-incremented.

Interrupt-enable Flag (IF) - setting this bit enables maskable interrupts.

Single-step Flag (TF) - if set then single-step interrupt will occur after the next instruction.

Sign Flag (SF) - set if the most significant bit of the result is set.

Zero Flag (ZF) - set if the result is zero.

Auxiliary carry Flag (AF) - set if there was a carry from or borrow to bits 0-3 in the AL register.

Parity Flag (PF) - set if parity (the number of "1" bits) in the low-order byte of the result is even.

Carry Flag (CF) - set if there was a carry from or borrow to the most significant bit during last result calculation.

The Fetch-Execute Cycle

In addition to the above registers, the 8088 has a special16-bit instruction register (ir) that holds the current binary instruction.

while(true) {
if (FLAGS.IF == 1) { // interrupt pending!
save sp, ip, FLAGS, etc. on stack
ip = address of interrupt handler
}
ir = mem(ip++);
if (ir == ret) break:
execute(ir);
}